Sorry, this job is no longer available.

(Loading More Opportunities)

RTL Design Lead - Digital Design

About The Job

Are you looking for a career at one of the leading semiconductor companies in the world? Texas Instruments (TI) is looking for an experienced Lead - Digital Design to join the team of enthusiastic engineers who develops highly complex & industry leading devices for audio applications.

You will be part of the team with charter to develop new Audio converters catering to PE, Automotive and Industrial market segment. The digital content on these audio products include a DSP for digital filters and audio signal processing blocks, among various other IPs

You will interface with various engineering teams within the product line including analog design, layout, firmware, verification, validation, test, systems, applications and marketing to successfully execute new products from concept to volume production and subsequent support.

You will be a core member in a design team driving flawless execution, while finding innovative design architecture and solutions to customers’ problems through “out of the box thinking” to deliver highly differentiated products.

This is a great opportunity to be part of an established team that’s continuing to look for growth opportunities, working with worldwide leading customers and developing cutting edge solutions in the areas of consumer electronics, industrial and automotive markets.

Position : Lead - Digital Design

Location : Bangalore

Experience : 7+ years in digital design

Minimum Qualifications: Bachelor's/Master's Degree in EE

What will you be doing in this role? (Responsibilities)

· Be a key team member from product definition till release to market, working closely with all functions (e.g. systems, analog design, firmware, verification, test, applications).

· Define or enhance the micro-architecture for digital blocks/top and designing them along with rest of the team.

· RTL development and verification (RTL and Gate level).

· Mentor the team of ~4 members

· Lead development of digital design in complex mixed-signal products with highly integrated digital signal processing, control and interface blocks.

· Collaborate with analog designers & F/W team on mixed-signal and DSP blocks and interfaces.

· Work closely with verification team to build the full-chip verification plan, tests. Support functional debugs and RCAs.

· Support silicon validation activities, test program development and the customer engagement and silicon/application debug needs.

· Drive architectural optimization for area, power and performance improvements for a given node.

· Address performance bottlenecks through micro-architecture.

What do we expect from you? (Mini Qualifications)

· Hands on front-end design experience of complex multi clock domain blocks and low power designs.

· Ability to convert high level system requirements/changes into micro-architectural changes and then into RTL

· Ability to extract the functionality / micro-architecture of existing design even with sparse legacy documentation

· Familiarity with verification environments to be able to actively participate in functional debugs

· Good knowledge on static timing analysis, constraints debugging and physical design flows

· Understand and own in detail the functional specifications of the IPs/SoC

· Ensure that design-for-test (DFT) standards are addressed by design

· Participate in and conduct design reviews. Create the necessary design documentation

· Ability to take initiatives and drive the results working with team members across time-zones

· Handling & owning design deliverables and schedule

· Bachelors / Masters in Electrical / Electronic Engineering

· Good mentoring, communication, presentation skills and team work.

Preferred Skills/ Experience

Knowledge and experience in one or more of the following aspects is an added advantage:

· Excellent RTL design (Verilog) skill including Lint, Simulation, Debug, Synthesis and LEC (preferably Cadence toolchain).

· Experience in identifying and implementing complex ECO in netlist.

· Experience in writing and debugging timing constraints at IP / SoC level

· Experience in silicon functional debug/RCA to map bugs to RTL. Familiarity with Si-bringup & Bench testing

· Experience in FPGA prototyping of full/parts of system would be a plus.

· Experience in digital signal processing and Matlab modelling would be a plus.

· Understanding of interfaces like I2S, I2C, PDM, Soundwire, SPI would be a plus

· Exposure to Audio design would be a plus

bangalore, KA, IN