Siemens EDA is looking for self-motivated engineers to work inlogic/physical synthesis and timing optimization software development for theRTL synthesis tool.
The candidate will be responsible for:
Design, develop, modify, and implement software programming forproducts (both internal and external) with focus on surpassing customerexpectations, on achieving high quality and on-time delivery.
Degree:3-10 Years of experiencewith MS or Ph.D. in ElectricalEngineering, Computer Science, or equivalent degrees
Keywords:C/C++, Algorithms, RTL Synthesis, NetlistOptimization, Timing Optimization, Verilog/VHDL
Where permitted by applicable law,Siemens may require employees to be fully vaccinated against COVID-19 based onjob requirements, and in accordance with an accommodation based on legallyprotected reasons.
Organization: Digital Industries
Company: Siemens Industry Software Inc.
Experience Level: Experienced Professional
Job Type: Full-time
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