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Specialist -IC Layout


The Advanced Imager Technology Group at MIT Lincoln Laboratory develops revolutionary imaging platforms that enable impactful national security capabilities and scientific discovery. From fundamental device research, to developing camera technology for fielded systems, our group covers the full technology development spectrum from concept to prototype. Research areas include novel imager and detector design with in-house silicon and compound semiconductor fabrication facilities, leading-edge integrated circuit design, and advanced packaging and 3D integration capabilities.  Examples of our technology include highly sensitive CCDs for astronomy, digital infrared imagers with on-chip processing, and single-photon-sensitive cameras for ladar and optical communications.  Beyond technology development, we collaborate with government, industry, and academia to explore emerging technologies, identify next-generation sensor needs, and fabricate prototype systems.

The Advanced Imager Technology Group is seeking to hire a Specialist to support its design team by performing integrated circuit layout.  Experience with full custom IC layout in an industry standard layout tool is required (Cadence Virtuoso preferred).   Candidates should also have experience running Calibre for physical verification (DRC and LVS).  A basic understanding of circuit design theory and familiarity with analog layout techniques is desirable.  Experience with chip level floorplanning and digital place and route tools is a plus, as is experience in deeply scaled process technologies (

MIT Lincoln Laboratory
Full time