Salary Range:$144,000 – $183,000 Salary range estimated by Zippia
Posted 16 minutes ago
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Description
Summary
Posted: Oct 5, 2023
Role Number:200508568
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices! In this highly transparent role as a member of the STA CAD Tech & Signoff team, you will be an integral part of the effort to improve the performance of Apple silicon. You will be responsible for all aspects of timing including working with designers for timing changes, helping construct/modify flows, timing analysis and timing closure.
Key Qualifications
Description
- Work with design teams to understand and debug issues related to constraints, flow scripts, and timing closure. - Facilitate and drive STA methodology changes to improve overall STA flows. - Create/maintain scripts and methods for timing analysis and power reduction. - Deep analysis of timing paths to identify key issues. - Implement infrastructure/scripts to facilitate large scale timing reports mining and visualization. - Help build timing and power ECO custom scripts for project tapeout. - Work with Physical Design team, highlighting issues and standard methodologies. - Document and help with guidelines/specs.
Education & Experience
Minimum requirement of BS + 3 years of relevant industry experience.
Additional Requirements
Pay & Benefits
Posted: Oct 5, 2023
Role Number:200508568
Do you love creating elegant solutions to highly complex challenges? Do you intrinsically see the importance in every detail? As part of our Silicon Technologies group, you'll help design and manufacture our next-generation, high-performance, power-efficient processor, system-on-chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the tasks that make them beloved by millions. Joining this group means you'll be responsible for crafting and building the technology that fuels Apple's devices. Together, you and your team will enable our customers to do all the things they love with their devices! In this highly transparent role as a member of the STA CAD Tech & Signoff team, you will be an integral part of the effort to improve the performance of Apple silicon. You will be responsible for all aspects of timing including working with designers for timing changes, helping construct/modify flows, timing analysis and timing closure.
Key Qualifications
- Typically requires experience in static timing analysis flows.
- Familiar with all aspects of STA of large high-performance SoC or Processor designs in deep sub-micron technologies.
- Proficiency in analysis, tools, and methodologies for timing closure.
- Deep understanding of noise, cross-talk, OCV effects, margins, and constraints.
- Programming in Perl, Python, Tcl, C++ or other languages is a must.
- Good communicator who can accurately assess and describe issues to management as well as follow solutions through to completion.
- Familiarity with timing and power ECO techniques and implementation, circuit modeling, including SPICE models and worst-case corner selection is a plus.
- Familiarity in distributed/scalable software development processes, including documentation and testing.
Description
- Work with design teams to understand and debug issues related to constraints, flow scripts, and timing closure. - Facilitate and drive STA methodology changes to improve overall STA flows. - Create/maintain scripts and methods for timing analysis and power reduction. - Deep analysis of timing paths to identify key issues. - Implement infrastructure/scripts to facilitate large scale timing reports mining and visualization. - Help build timing and power ECO custom scripts for project tapeout. - Work with Physical Design team, highlighting issues and standard methodologies. - Document and help with guidelines/specs.
Education & Experience
Minimum requirement of BS + 3 years of relevant industry experience.
Additional Requirements
Pay & Benefits
- At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $138,900.00 and $256,500.00, and your base pay will depend on your skills, qualifications, experience, and location.
Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses - including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits.
Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.
Apple is an equal opportunity employer that is committed to inclusion and diversity. We take affirmative action to ensure equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.
