ASIC Digital Design Engineer

ASIC Digital Design Engineer

Synopsys Inc | Pune, MH, IN

Posted a month ago

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Description

Location: Pune

Experience: 3 - 10yrs


Role:

  • Define, update test scenarios using the existing SV/UVM test benches to co-simulate mixed signal designs.
  • Verify the functionalities of SERDES.
  • Define and tracking verification test plans.
  • Debug simulation failures in both analog and digital design.
  • Create top level analog test benches for SERDES.
  • Perform physical layout reliability testing for SERDES.


Skills Required:

  • Experience writing scripts in languages such as Perl, Python, shell.
  • Basic understanding of analog circuit designs such as bandgap, op-amp, PLL, Transmitter, Receivers etc.



At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.


Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.